Assume the gate delay is 50 ns. (1 ns = 10-9 seconds). enter all numbers as integers (i. e., no commas or decimal points)

(a)-the critical-path delay through a 4-bit ripple-carry adder is ns.
(b)-the critical-path delay through the 4-bit adder/subtractor we designed is ns.
(c)-the critical-path delay through the 4-bit adder/subtractor that detects overflow is ns.
(d)-the 4-bit adder/subtractor that detects overflow can perform additions or subtractions per second.