In the embedded market, where cost is crucial, processors sometimes implement floating point only in software. We are interested in two implementations of a computer, one with and one without special floating-point hardware. Consider a program, P, with the following mix of operations: Floating-point multiply: 15% Floating-point add: 20% Floating-point divide: 10% Integer instructions: 55% Compute MFP (computer with floating point) has floating-point hardware and can therefore implement the floating-point operations directly. It re- quires the following number of clock cycles for each instruction class: Floating-point multiply: 6 Floating-point add: 4 Floating-point divide: 20 Integer instructions: 2 Computer MNFP (computer with no floating point) has no floating-point hardware and so must emulate the floating-point operations using integer instructions. The integer instructions all take 2 clock cycles. The number of integer instructions needed to implement each of the floating-point operations is as follows: Floating-point multiply: 30 Floating-point add: 20 Floating-point divide: 50 Both computers have a clock rate of 1000 MHz. Find the native MIPS ratings for both computers. If the computer MFP in Exercise needs 300 million instructions for this program, how many integer instructions does the computer MNFP require for the same program? Assuming the instruction counts from Part (b), what is the execution time (in seconds) for the program in Exercise run on MFP and MNFP?