A computer has a two-level cache for which 80% of the memory references are L1 hits, 15% are L2 hits, and 5% miss the cache and require main memory access. Suppose the access times are 5, 15, and 60 nanoseconds, respectively, for L1, L2, and main memory. Call these t1, t2, and tm. Furthermore, suppose it takes equally long to determine a miss as it does to determine a hit and that an L1 miss must be incurred before attempting L2 access. Likewise, an L2 miss must be incurred before accessing main memory. Thus, it takes t1=5ns to find L1 data, t1+t2=20ns to find L2 data, and t1+tz+tm=80ns to find main memory data.

a. What is the expected access time?
b. What is the relative performance gain from having the level 2 cache?