Consider a single-issue design with a single execution pipeline with five-stages (Fetch, Decode, Execute, Memory, Write Back) capable of beginning execution of one instruction per cycle with data forwarding and bypassing hardware, all memory accesses take 1 (one) clock cycle, and all memory references hit in the cache. Assume that the branch is handled by predicting it not taken. Use the following code fragment and assume that the initial value of R4 is R2+440. Please show the timing of the instruction sequence for this pipeline using the given pipeline chart. How many cycles does this loop take to execute? Attach File

Consider the following code snippet: #ifndef cashregister_h#define cashregister_hconst double max_balance = 6000000.0; class cashregister{public: cashregister(); cashregister(double new_balance); void set_balance(double new_balance); double get_balance() const; private: double balance[12]; }; double get_monthly_balance(cashregister bk, int month); #endifwhich of the following is correct? a)the header file is correct as given.b)the definition of max_balance should be removed since header files should not contain constants.c)the definition of cashregister should be removed since header files should not contain class definitions.d)the body of the get_monthly_balance function should be added to the header file.