Consider a cache with 2 word blocks, which is byte addressable.

a) if this cache holds 64 kb of data, how many index bits does it need and why?
b) what is the total cache size that holds these data considering that it uses 3-bit word offset and 1-bit block offset (do not forget about the valid bits it uses);
c) we decide to increase the cache so it can hold to 128 kb of data. each block this time has 8 words. how many index bits does this new cache have and why?
d) what is the total size of this new cache, if it uses 3-bit word offset and a number of block offset bits needed by the mux to determine which word is needed by the pipeline?
e) draw the cache in question d.