Construct the D-flip-flop with negative edge triggering using any number of inverters and transmission gates (no asynchronous clear is needed). The design goal is to obtain a small propagation delay from D to Q after the negative clock edge. The circuit inputs are D, CLOCK; there is only one output Q. Hint: for the Master D-latch output use the complement of Q. Show the schematic using inverters and transmission gates as building blocks.

Along 8-cm diameter steam pipe whose external surface temperature is 900c connects two buildings. the pipe is exposed to ambient air at 70c with a wind speed of 50 km/hr blowing across the pipe. determine the heat loss from the pipe per unit length. (b) air at 500c enters a section of a rectangular duct (15 cm x 20 cm) at an average velocity of 7 m/s. if the walls of the duct are maintained at 100c. a) the length of the tube for an exit temperature of the air to be 40 0c. b)the rate of heat transfer from the air. c) the fan power needed to overcome the pressure drop in this section of the duct.