5.5.1 Dual-edge detector A dual-edge detector is similar to a rising-edge detector except that the output is asserted for one clock cycle when the input changes from 0 to 1 (i. e., rising edge) and 1 to 0 (i. e falling edge). 1. Design a circuit based on the Moore machine and draw the state diagram and ASM chart. 2. Derive the HDL code based on the state diagram of the ASM chart. 3. Derive a testbench and use simulation to verify operation of the code.